MU9C8328A-RDC 데이터 시트보기 (PDF) - Music Semiconductors

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MU9C8328A-RDC

Ethernet Interface

Music Semiconductors 

MU9C8328A Ethernet Interface

FUNCTIONAL DESCRIPTION Continued

Bit Mnemonic

15–8

7 COL

6 LOC

5 BUSY

4 MATCH

3 FULL

2 DAM

1 SAM

0 REJECT

Bit Mnemonic

15–0 ALOC

Bit Mnemonic

15-0 UOC

Bit Mnemonic

15-0 POC

Bit Mnemonic

15-8 NEW_TS

7-0 OLD_TS

STATUS REGISTER (0001)

Description

Reserved.

1 = Collision detected.

1 = Loss of carrier detected.

1 = Network port is busy using the LANCAM.

1 = A match was found.

1 = The LANCAM is full.

1 = A Destination Address match was found.

1 = A Source Address match was found.

1 = The frame was rejected.

LEARN OP-CODE REGISTER (0010)

Description

Contains the Op-Code to be used for an auto-learn, if enabled. Default is 0334H

(MOV NF, CR, V), but can be overwritten.

UPDATE OP-CODE REGISTER (1000)

Description

Contains the Op-Code to be used for updating the time stamp on a SA match

Default is 0300H (NOP). To update time stamp write 0328H (MOV HM, CR) to this register.

PURGE OP-CODE REGISTER (1001)

Description

Contains the Op-Code to be used for the purge routine. Default is 043DH (VBC ALM,E).

TIME STAMP REGISTER (1010)

Description

The value used for time stamp updates.

The value used to purge old entries.

Table 2: Register Descriptions Continued

Rev. 0.8 Draft

8

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