VP5511C 데이터 시트보기 (PDF) - Mitel Networks
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VP5511C Datasheet PDF : 16 Pages
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VP5311C/VP5511C
Pixel Data Input (PD[7,0])
Sample Number
1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450
Y719 $FF $00 $00 $XY
ANCILLARY DATA...
EAV SEQUENCE
t SU; PD
t PWL; PXCK
PXCK Input (27MHz)
t PWH; PXCK
t HD; PD
t SU; PALID
t DUR; PALID
t HD; PALID
Input (PALID)
PALID Stable
Fig.6 PALID input timing
TIMING INFORMATION
Parameters
Master clock frequency (PXCK input)
PXCX pulse width, HIGH
PXCX pulse width, LOW
PXCX rise time
PXCX fall time
PD7-0 set up time
PD7-0 hold time
SCSYNC set up time
SCSYNC hold time
PALID set up time
PALID hold time
PALID duration
Conditions
10% to 90% points
90% to 10% points
Output delay
PXCK to COMPSYNC
PXCK to CLAMP
Note: Timing reference points are at the 50% level. Digital C LOAD <40pF.
Symbol
fPXCK
tPWH; PXCK
tPWL; PXCK
tRP
tFP
tSU;PD
tHD;PD
tSU;SCSYNC
tHD;SCSYNC
tSU;PALID
tHD;PALID
tDUR;PALID
tDOS
Min.
10
14.5
10
5
10
0
10
0
9
Typ.
27.0
Max.
TBD
TBD
25
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
PXCX
periods
ns
12
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