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74LVC32A Datasheet PDF : 14 Pages
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NXP Semiconductors
74LVC32A
Quad 2-input OR gate
5.2 Pin description
Table 2. Pin description
Symbol
Pin
1A, 2A, 3A, 4A
1, 4, 9, 12
1B, 2B, 3B, 4B
2, 5, 10, 13
1Y, 2Y, 3Y, 4Y
3, 6, 8, 11
GND
7
VCC
14
Description
data input
data input
data output
ground (0 V)
supply voltage
6. Functional description
Table 3. Function selection[1]
Input
nA
nB
L
L
X
H
H
X
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care
7. Limiting values
Output
nY
L
H
H
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min Max
Unit
VCC
IIK
VI
IOK
VO
IO
ICC
IGND
Tstg
Ptot
supply voltage
input clamping current
input voltage
output clamping current
output voltage
output current
supply current
ground current
storage temperature
total power dissipation
VI < 0
VO > VCC or VO < 0
VO = 0 V to VCC
Tamb = 40 C to +125 C
0.5 +6.5
V
50 -
mA
[1] 0.5 +6.5
V
-
50
mA
[2] 0.5 VCC + 0.5
V
-
50
mA
-
100
mA
100 -
mA
65 +150
C
[3] -
500
mW
[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.
[2] The output voltage ratings may be exceeded if the output current ratings are observed.
[3] For SO14 packages: above 70 C derate linearly with 8 mW/K.
For (T)SSOP14 packages: above 60 C derate linearly with 5.5 mW/K.
For DHVQFN14 packages: above 60 C derate linearly with 4.5 mW/K.
74LVC32A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 17 November 2011
© NXP B.V. 2011. All rights reserved.
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