GS880E32T-11I 데이터 시트보기 (PDF) - Giga Semiconductor
부품명
상세내역
일치하는 목록
GS880E32T-11I Datasheet PDF : 25 Pages
| |||
TQFP Pin Description
Pin Location
Symbol
Typ
e
37, 36
A0, A1
I
35, 34, 33, 32, 100, 99, 82, 81, 44, 45, 46,
47, 48, 49, 50, 43
A2–A17
I
80
63, 62, 59, 58, 57, 56, 53, 52
68, 69, 72, 73, 74, 75, 78, 79
13, 12, 9, 8, 7, 6, 3, 2
18, 19, 22, 23, 24, 25, 28, 29
51, 80, 1, 30
51, 80, 1, 30
A18
I
DQA1–DQA8
DQB1–DQB8
DQC1–DQC8
I/O
DQD1–DQD8
DQA9, DQB9,
DQC9, DQD9
I/O
NC
—
58, 59, 62, 63, 68, 69, 72, 73, 74
8, 9, 12, 13, 18, 19, 22, 23, 24
51, 52, 53, 56, 57
75, 78, 79,
1, 2, 3, 6, 7
25, 28, 29, 30
DQA1–DQA9
DQB1–DQB9
I/O
NC
—
87
BW
I
93, 94
BA, BB
I
95, 96
BC, BD
I
95, 96
NC
—
89
CK
I
88
GW
I
98, 92
E1, E3
I
97
E2
I
86
G
I
83
ADV
I
84, 85
ADSP, ADSC I
64
ZZ
I
14
FT
I
31
LBO
I
15, 41, 65, 91
VDD
I
5,10,17, 21, 26, 40, 55, 60, 67, 71, 76, 90
VSS
I
4, 11, 20, 27, 54, 61, 70, 77
VDDQ
I
16, 38, 39, 42, 66
NC
—
Preliminary
GS880E18/32/36T-11/11.5/100/80/66
Description
Address field LSBs and Address Counter preset Inputs
Address Inputs
Address Inputs
Data Input and Output pins (x32, x36 Version)
Data Input and Output pins
No Connect (x32 Version)
Data Input and Output pins
No Connect
Byte Write—Writes all enabled bytes; active low
Byte Write Enable for DQA, DQB Data I/Os; active low
Byte Write Enable for DQC, DQD Data I/Os; active low (x32, x36
Version)
No Connect (x18 Version)
Clock Input Signal; active high
Global Write Enable—Writes all bytes; active low
Chip Enable; active low
Chip Enable; active high
Output Enable; active low
Burst address counter advance enable; active low
Address Strobe (Processor, Cache Controller); active low
Sleep mode control; active high
Flow Through or Pipeline mode; active low
Linear Burst Order mode; active low
Core power supply
I/O and Core Ground
Output driver power supply
No Connect.
Rev: 1.11 11/2000
5/25
© 2000, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Share Link: 