l Includes a programmable, PCI burst size and
early tx/rx threshold.
l Supports a 32-bit general-purpose timer with
the external PCI clock as clock source, to
generate timer-interrupt
l Contains two large (2Kbyte) independent
receive and transmit FIFO’s
l Uses 93C46 (64*16-bit EEPROM) to store
RTL8130 Preliminary
resource configuration, ID parameter.
l Supports LED pins for various network
activity indications
l Supports digital and analog loopback
capability on both ports
l Half/Full duplex capability
l Supports Full Duplex Flow Control (IEEE
802.3x)
1999/5/30
2
Ver.1.1