W83178S 데이터 시트보기 (PDF) - Winbond
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W83178S Datasheet PDF : 7 Pages
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Preliminary W83178S
100 MHZ 3-DIMM SDRAM BUFFER
1. GENERAL DESCRIPTION
The W83178S is a 13 outputs SDRAM clock buffer for 3-DIMMs models incorporate with W83196S-
14 which is the clock synthesizer especially for the 100 MHz models such as Intel BX chipsets. (Refer
the datasheet fo Winbond W83196S-14)
The W83178S receives the clock from chipset by the Buffer_In pin and provides almost zero-delay
(less than 4 nS propagation delay) SDRAM buffer outputs for the 13 SDRAM clocks which are
synchronous with the CPU clock outputs priovided by W83196S-14. The clock skew between any two
clock outputs is less than 250 pS and the output buffer impedance is about 15 ohms.
The W83178S also provides I2C serial bus interface to program the registers to enable or disable
each SDRAM clock outputs.
2. FEATURES
• Supports Intel Pentium II CPUs for BX chipset
• 13 SDRAM clocks for 3-DIMMs
• Clock skew less than 250 pS
• Almost none delay Buffer-in controlling SDRAM clocks(<4 nS propagation delay)
• I2C 2-wire serial interface
• Programmable registers to enable/stop each output
• Incorporate with W83196S-14
• Packaged in 28-pin SOP
3. PIN CONFIGURATION
VDD
1
SDRAM 0
2
SDRAM 1
3
Vss
4
VDD
5
SDRAM 2
6
SDRAM 3
7
Vss
8
BUFFER_IN
9
SDRAM 4
10
SDRAM 5
11
SDRAM12
12
VDD
13
*SDATA
14
28
VDD
27
SDRAM11
26
SDRAM10
25
Vss
24
VDD
23
SDRAM 9
22
SDRAM 8
21
Vss
20
VDD
19
SDRAM 7
18
SDRAM 6
17
Vss
16
Vss
15
*SCLOCK
Publication Release Date: March 1999
-1-
Revision A1
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