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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

NJM555(2003) 데이터 시트보기 (PDF) - Japan Radio Corporation

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NJM555
(Rev.:2003)
JRC
Japan Radio Corporation  JRC
NJM555 Datasheet PDF : 6 Pages
1 2 3 4 5 6
NJM555
TIMER
GENERAL DESCRIPTION
The NJM555 monolithic timing circuit is a highly stable controller
capable of producing accruate time delays or oscillation. In the time
delay mode, delay time is precisely controlled by only two external
parts : a resistor and a capacitor. For operation as an oscillator, both
the free running frequency and the duty cycle are accurately controlled
by two external resistors and a capacitor.
Terminals are provided for triggering and resetting. The circuit will
trigger and reset on falling waveforms. The output can source or sink
up to 200mA or drive TTL circuits.
PACKAGE OUTLINE
NJM555D
NJM555M
FEATURES
Operating Voltage
(4.5V to 16V)
Less Number of External Components
Package Outline
DIP8, DMP8, SSOP8, SIP8
Bipolar Technology
NJM555L
NJM555V
PIN CONFIGURATION
NJM555D
NJM555M
NJM555V
EQUIVALENT CIRCUIT
NJM555L
Ver.2003-12-09
-1-

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