MSM56V16800F 데이터 시트보기 (PDF) - Oki Electric Industry

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MSM56V16800F

2-Bank x 1,048,576 Word x 8 Bit SYNCHRONOUS DYNAMIC RAM

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MSM56V16800F

PIN DESCRIPTION

CLK

CS

CKE

Address

A11

RAS

CAS

WE

DQM

DQi

Fetches all inputs at the “H” edge.

Disables or enables device operation by asserting or deactivating all inputs except CLK, CKE,

UDQM and LDQM.

Masks system clock to deactivate the subsequent CLK operation.

If CKE is deactivated, system clock will be masked so that the subsequent CLK operation is

deactivated. CKE should be asserted at least one cycle prior to a new command.

Row & column multiplexed.

Row address : RA0 – RA10

Column Address : CA0 – CA8

Slects bank to be activated during row address latch time and selects bank for precharge and

read/write during column address latch time. A11=”L” : Bank A, A11=”H” : Bank B

Functionality depends on the combination. For details, see the function truth table.

Masks the read data of two clocks later when DQM is set “H” at the “H” edge of the clock

signal. Masks the write data of the same clock when DQM is set “H” at the “H” edge of the

clock signal.

Data inputs/outputs are multiplexed on the same pin.

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