LAN83C183 데이터 시트보기 (PDF) - SMSC -> Microchip

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LAN83C183

10/100 Mbps TX/FX/10BT Fast Ethernet Physical Layer Device (PHY)

SMSC -> Microchip 

to an external Ethernet controller. The format of the received data at the Controller

interface is as shown in Table 1.2.

Table 1.2 Receive Preamble and SFD Bits at MAC Nibble Interface

Signals

Bit Value

RXDO X 11 1 1 1 1 1 1 1 1 1 1 1 1 1 1 12 1 D03 D44

RXD1 X 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D1 D5

RXD2 X 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D2 D6

RXD3 X 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 D3 D7

RX_DV 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

1. First preamble nibble received. Depending on the mode, the device may eliminate either all or some

of the preamble nibbles, up to the first SFD nibble.

2. First SFD nibble received.

3. First data nibble received.

4. D0 through D7 are the first 8 bits of the data field.

1.1.2.2 100BASE-FX

100BASE-FX operation is similar to 100BASE-TX operation except:

• The transmit output/receive input is not scrambled or MLT3 encoded

• The transmit data is output to a FX transmitter instead of the TP waveshaper/

transmitter

• The receive data is input to the FX ECL level detector instead of the equalizer

and associated TP circuitry

• The FX Interface has a signal detect input

1.1.2.3 10BASE-T

10BASE-T operation is similar to the 100BASE-TX operation except:

• There is no scrambler/descrambler

• The encoder/decoder is Manchester instead of 4B5B

• The data rate is 10 Mbits/s instead of 100 Mbits/s,

• The twisted-pair symbol data is two-level Manchester instead of ternary MLT-3.

• The transmitter generates link pulses during the idle period

• The transmitter detects the jabber condition

• The receiver detects link pulses and implements the AutoNegotiation algorithm

SMSC DS – LAN83C183

15

Rev. 12/14/2000

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