ISL6410A 데이터 시트보기 (PDF) - Intersil

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ISL6410A

Single Synchronous Buck Regulators with Integrated FET

Intersil 

Functional Block Diagram for MSOP Version

VIN

10µF

2 VIN

3 GND

7 SYNC

6 VSET

8 EN

SOFT

START

SLOPE

COMPENSATION

EA

GM

EN

PWM

OVERCURRENT,

OVERVOLTAGE

LOGIC

COMPENSATION

750kHz

OSCILLATOR

POWER GOOD

PWM

VOUT

UVLO

PWM

REFERENCE

0.45V

4 PG

CURRENT

SENSE

GATE

DRIVE

PVCC 1

0.1µF

L1

8.2µH

L9

VOUT

10µF

PGND 10

FB 5

NOTES:

1. VIN is 3.3V for ISL6410 and 5.0V for ISL6410A.

2. VSET in the above schematic is connected to VIN, so the VOUT is 1.8V for ISL6410 and 3.3V for ISL6410A.

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