IL145567
TSx
MCLKX
MCLKR
BCLKX
FSx
tSU(F)
tH(BF)
Dx
BCLKR
FSR
tSU(F)
tH(BF)
DR
td(BTS)
tW(M)
tW(M)
td(ZC)
tSU(BRM)
tSU(MFB)
tW(B)
tW(B)
1
2
3
4
5
6
7
8
9
tH(F)
td(BD)
MSB
CH1
CH2
CH3 ST1
ST2
td(ZC)
ST3 LSB
1
2
3
4
5
6
7
8
9
tH(F)
tSU(DB)
tH(BD)
MSB
CH1
CH2
CH3
ST1
ST2
tH(BD)
ST3 LSB
At Short Frame synchronisation, synchronisation pulses FSx or FSR should have duration equal to duration
of clock generator MCLK pulses.
Figure 3 – Time diagram at Short Frame synchronisation
8