Preliminary
RF2162
Application Schematic - US TDMA
P1-1
C30
Interstage tuning for
centering frequency response
TL5
100 pF
3.6 pF
1.5 nH
TL7
1 16 15 14 13
100 pF
2
To Vary Gain
3
820 Ω
12
TL1
11
RF IN
100 pF
Matching network for
optimum input return loss
15 nH
4
10
56 7 89
0Ω
100 pF
27 nH
Bias Return
10 nF
Bypassing for VCC
2nd Harmonic Trap
100 pF
16 nH* 1 pF
TL2
1.5 nH
TL3
100 pF
12 pF**
4.7 pF**
RF OUT
Matching network for
optimum load
impedance
VREG
VMODE
1 kΩ
100 pF
Bypassing for
VREG1 and VREG2
* L1 is a High Q inductor (i.e.,Coilcraft 0805HQ-series).
**C1 and C14 are High Q capacitors (i.e., Johanson C-series).
Rev A19 060208
2-231