M68AW127BL10N6 데이터 시트보기 (PDF) - STMicroelectronics

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M68AW127BL10N6

1Mbit (128K x8), 3.0V Asynchronous SRAM

STMicroelectronics 

M68AW127B

Figure 9. Chip Enable or Output Enable Controlled, Read Mode AC Waveforms.

A0-A16

E1

tAVQV

tELQV

tAVAV

VALID

tAXQX

tEHQZ

E2

G

DQ0-DQ7

tELQX

tGLQV

tGLQX

tGHQZ

VALID

Note: Write Enable (W) = High.

Figure 10. Chip Enable Controlled, Standby Mode AC Waveforms

AI05476

E1

E2

tPU

ICC

50%

ISB

tPD

AI05477

9/20

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