Switching Waveforms (continued)
Write Cycle No. 1 (WE Controlled)[8, 10]
ADDRESS
CE1
tWC
tSCE1
CE2
tSCE2
OE
tAW
tHA
tSA
WE
tPWE
DATA IN
DATA I/O
DATA UNDEFINED
Write Cycle No. 2 (CE Controlled)[8, 10, 11]
tSD
tHD
DATAIN VALID
tHZWE
tLZWE
HIGH IMPEDANCE
ADDRESS
CE1
tWC
tSCE1
CE2
WE
DATA IN
DATA I/O
tSA
tAW
DATA UNDEFINED
tSCE2
tHA
tPWE
tSD
tHD
DATAIN VALID
tHZWE
HIGH IMPEDANCE
Note:
11. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
CY6264
Document #: 001-02367 Rev. *A
Page 5 of 9
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