SMC91C95 데이터 시트보기 (PDF) - SMSC -> Microchip
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SMC91C95 Datasheet PDF : 139 Pages
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A0-15
AEN,
nSBHE
nIOCS16
VALID ADDRESS
t20
nIORD
nIOWR
t9
Z
Z
t10
IOCHRDY
D0-D15
Z
Z
VALID DATA
VALID ADDRESS
Z
VALID DATA
Parameter
t9
Control Active to IOCHRDY Low
t10
IOCHRDY Low Pulse Width*
t20
Cycle time**
min
typ
max
units
15
ns
100
150
ns
185
ns
*Note: Assuming NO WAIT ST = 0 in configuration register and cycle time observed.
**Note: The cycle time is defined only for accesses to the Data Register as follows:
For Data Register Read - From nIORD falling to next nIORD falling
For Data Register Write - From nIOWR rising to next nIOWR rising
FIGURE 29 - ISA CONSECUTIVE READ AND WRITE CYCLES
121
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