GS71116J 데이터 시트보기 (PDF) - Giga Semiconductor

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GS71116J

64K x 16 1Mb Asynchronous SRAM

Giga Semiconductor 

Write Cycle 3: UB, LB control

Address

OE

CE

UB, LB

WE

Data In

Data Out

GS71116TP/J/U

tWC

tAW

tAS

tCW

tWR1

tBW

tWP

tDW tDH

Data valid

High impedance

Rev: 1.06 6/2000

10/15

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

© 1999, Giga Semiconductor, Inc.

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