J177 데이터 시트보기 (PDF) - InterFET

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J177

P-Channel Silicon Junction Field-Effect Transistor

InterFET  

01/99

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B-53

J176, J177

P-Channel Silicon Junction Field-Effect Transistor

Absolute maximum ratings at TA = 25¡C

Reverse Gate Source & Reverse Gate Drain Voltage

Continuous Forward Gate Current

Continuous Device Power Dissipation

Power Derating

– 30 V

50 mA

360 mW

3.27 mW/°C

At 25°C free air temperature:

Static Electrical Characteristics

Gate Source Breakdown Voltage

Gate Reverse Current

Gate Source Cutoff Voltage

Drain Saturation Current (Pulsed)

Drain Cutoff Current

Dynamic Electrical Characteristics

Drain Source ON Resistance

Dynamic Electrical Characteristics

Drain Gate Capacitance

Source Gate Capacitance

Drain Gate + Source Gate Capacitance

Switching Characteristics

Turn ON Delay Time

Rise Time

Turn OFF Delay Time

Fall Time

V(BR)GSS

IGSS

VGS(OFF)

IDSS

ID(OFF)

rds(on)

Cgd

Cgs

Cgd + Cgs

J176

J177

Min Max Min Max Unit

30

30

V

1

1 nA

1 4 0.8 2.25 V

– 2 – 35 – 1.5 – 20 mA

–1

– 1 nA

Max

Max

250

300

Ω

Typ

Typ

5.5

5.5

pF

5.5

5.5

pF

32

32

pF

td(on)

15

20

ns

tr

20

25

ns

td(off)

15

20

ns

tf

20

25

ns

Process PJ99

Test Conditions

IG = 1 µA, VDS = ØV

VGS = 20V, VDS = ØV

VDS = – 15V, ID = – 10 nA

VDS = – 15V, VGS = ØV

VDS = – 15V, VGS = 10V

VGS = Ø, VDS < = 0.1V

f = 1 kHz

VDS = ØV, VGS = 10V

VDS = ØV, VGS = 10V

VDS = VGS = ØV

f = 1 MHz

f = 1 MHz

f = 1 MHz

VDD

VGS(OFF)

RL

VGS(ON)

J176 J177

–6

–6

V

6

3

V

5.6 k

10 k

Ω

Ø

Ø

V

TOÐ226AA Package

Dimensions in Inches (mm)

Pin Configuration

1 Drain, 2 Gate, 3 Source

www.interfet.com

Surface Mount

SMPJ176, SMPJ177

1000 N. Shiloh Road, Garland, TX 75042

(972) 487-1287 FAX (972) 276-3375

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