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MC74AC109MEL 데이터시트 - ON Semiconductor

부품번호MC74AC109MEL ONSEMI
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상세내역(기능)Dual JK Positive Edge−Triggered Flip−Flop
MC74AC109MEL PDF 데이터시트 : MC74AC109MEL pdf   
74AC109 image

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform.
The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J and K inputs together.
   Asynchronous Inputs:
      LOW input to SD (Set) sets Q to HIGH level
      LOW input to CD (Clear) sets Q to LOW level
      Clear and Set are independent of clock
      Simultaneous LOW on CD and SD makes both Q and Q HIGH
  
• Outputs Source/Sink 24 mA
• ′ACT109 Has TTL Compatible Inputs

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