The LVQ240 is an inverting octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which provides improved PC board density.
● Ideal for low power/low noise 3.3V applications
● Implements patented EMI reduction circuitry
● Available in SOIC JEDEC, SOIC EIAJ, and QSOP packages
● Guaranteed simultaneous switching noise level and dynamic threshold performance
● Improved latch-up immunity
● Guaranteed incident wave switching into 75Ω
● 4 kV minimum ESD immunity