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74LCX112SJ Datasheet PDF - Fairchild Semiconductor

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74LCX112SJ Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs Fairchild
Fairchild Semiconductor Fairchild
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74LCX112SJ Datasheet PDF : 74LCX112SJ pdf   
74LCX112 image

General Description
The LCX112 is a dual J-K flip-flop. Each flip-flop has inde pendent J, K, PRESET, CLEAR, and CLOCK inputs with Q, Q outputs. These devices are edge sensitive and change state on the negative going transition of the clock pulse. Clear and preset are independent of the clock and accomplished by a low logic level on the corresponding input. LCX devices are designed for low voltage (3.3V or 2.5) operation with the added capability of interfacing to a 5V signal environment.
The 74LCX112 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.

Features
■ 5V tolerant inputs
■ 2.3V–3.6V VCC specifications provided
■ 7.5 ns tPD max (VCC = 3.3V), 10 µA ICC max
■ Power down high impedance inputs and outputs
■ ±24 mA output drive (VCC = 3.0V)
■ Implements patented noise/EMI reduction circuitry
■ Latch-up performance exceeds 500 mA
■ ESD performance:
   Human body model > 2000V
   Machine model > 2000V

 

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